Business Sharing (北20 - 張葳春）

會長 and dear alumnus,

Please enter this to CAFES blog. 

I'm writing my ideas in English b/c it is easier in English SW capabilities, and I do not have better chinese SW in my laptop.

I'm sharing my Hi-Tech business ideas, with several goals.

• I truly believe that my IP has a unique niche that is very advance, not obvious, but feasible to implement if we understand it, and gather a small resource to achieve big goals. 
• I need more skills and resource to form a join venture ($M JV). The group endeavors will make tasks easier to success.
• The timing has arrived, and the industry is hungry to see the solutions which opens a emerging avenue to save the industry from fading and direct it to a new promising land. Both individuals and society are benefited ($B returns).

My IP is to use a niche IC circuit element named complementary Low Threshold Schottky barrier diode (LtSBD or simply SBD) to form integrated sub-circuits with CMOS transistors. These circuits then may construct complicated blocks to implement generic analog-logic-memory (ALM) functional blocks, they are applied to chips and modules that will offer system solutions with Performance/Cost (P/C) ratios 10-100 fold superior than the same built of the current state of the CMOS arts. Which was governed by Intel's famous Moore's law for 40 years.

The present IC technology and device applications a based on deep nano-meter lithography to drive generation after generation since the 1970s. In each generation, workers are seeking performance /unit costs (P/C ratio) improvements via signal reduction and chip area (Size) reductions. Recently, in deep nanometer Si spinning, we see the scaling trend saturated and is tapping off. The performance gains are flattened while the engineering costs becomes unbearable. Speed and compactness hitted the wall for the unit has heat removal problems. On the other hand, bellow 100 nm CMOS manufacturing, the processing costs due to equipments and containable defect rates for marginal good yield increases exponentially high. The production can hardly reach the 20 nm national barrier. and there are none alternative solutions in CMOS devices that will lead us to see lights in the dark tunnel.

My IP will offer alternative IC solution to a new horizon. By using new DTL circuit configuration with the new SBD, we may using low voltage and current circuits to replace most of digital and analog circuitries in any ALM blocks, thus achieve both performance improvements via speed, and density increment, while achieve size and processing step reductions, and power(heat) savings. 

Why it has not been adopted?

The main reasons were that CMOS was running full steam for 30 years, only slow dow in the past few years when it hitted the wall. SBD solution was attempted in the 1970s with the Bipolar transistors in IBM. the experience also tarnished b/c it appear have high leakge current in the ua level. The situations changed in 2004 when TSMC tried LtSBD feasibility experiment yield complementary SBD, and the leakage was in nA level. With circuit techniques, namely SCMOS(Super CMOS) for a work around, I can manage to build useful ALM blocks for VLSI chips. Besides, advanced solar energy harvest, and low power devices for bio-electro lab facility applications are also probed.

Is it interesting to you?

I'm looking for partners to propel the SCMOS JV to commercialization endeavors. I'm looking for talents and financial resources. You may download my NDA, and white paper to see if you are willing to join the joint venture. We are in the process of forming a sino-american JV Super CMOS International(SCI). You are welcome to send in your valuable comments as well as your ideas on how to do business together!

Sincerely

Gus Chang/GST
skype:gus_gsd